This U.S. nonprovisional patent application claims priority under 35 U.S.C. xc2xa7 119 from Korean Patent Application 2002-50495, filed Aug. 26, 2002, the entire contents of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a wafer table for supporting a wafer during sawing and chip removal operations, a semiconductor package manufacturing apparatus using such a wafer table and a method of using such.
2. Description of the Prior Art
A conventional semiconductor package manufacturing process typically comprises forming an electric circuit on a wafer, attaching a wafer tape to the lower surface of the wafer, sawing the wafer into individual chips (also referred to as dies), bonding one or more individual chip(s) to a board such as a lead frame or a printed circuit board, electrically connecting the individual chip(s) to the board, and encapsulating the chip(s) and the electrical connections.
In conventional wafer sawing processes, an adhesive wafer tape is applied to the rear surface of a wafer for maintaining the orientation of the individual chips as they are separated during the sawing process. The use of wafer tape, however, requires that a separate tape mounting process be performed before the sawing process may begin. The use of the wafer tape may also lead to contamination of the lower wafer surface that may reduce the reliability of the resulting semiconductor package(s).
In order to reduce problems associated with wafer tape, a wafer sawing apparatus and a tapeless wafer sawing process are disclosed in KR2000-34632A and U.S. Pat. No. 5,618,759. These references fasten the individual chips to a wafer table by using a plurality of vacuum chip absorbers rather than wafer tape. However, the process of picking a specific chip may still result in mechanical interference between the picked chip and adjacent chips and the loss of the vacuum force of the chip absorber as the individual chips are picked up.
In addition, when manufacturing Wafer Level Chip Size Packages (WL CSPs), i.e., chips on which a plurality of conductive bumps are formed, it is difficult to load the WL CSPs directly into sorting trays. Such loading involves turning the WL CSPs upside down, but because the distance between adjacent WL CSPs tends to be very small, the WL CSPs typically need to be transferred first onto a reversing table where they are flipped before being loaded into a sorting tray.
Exemplary embodiments of the invention provide a wafer table that can hold a wafer without using wafer tape and can separately transfer each of the individual chip without mechanical interference between the transferred chip and adjacent chips.
The exemplary embodiments of the invention also provide a semiconductor package manufacturing apparatus for carrying out wafer sawing and die bonding processes as an integrated process by using a wafer table according to the invention.
The exemplary embodiments of the invention also provide a semiconductor package manufacturing apparatus for carrying out wafer sawing and Wafer Level Chip Size Package (WL CSPs) loading as an integrated process using a wafer table according to the invention.
A wafer table according to an exemplary embodiment of the invention comprises an absorption plate, a plurality of chip absorbers, and a vacuum source. The absorption plate supports the wafer, and preferably has sawing guide grooves aligned with and positioned under the scribe lines on the wafer. The sawing guide grooves are preferably wider than the scribe lines and deeper than the lowest extension of the cutting means used in the wafer sawing process. Each of the chip absorbers comprises a mounting plate, a vacuum line connected to the mounting plate, and a driving means for selectively moving the associated chip absorber up and down. Each of the chip absorbers is installed on the absorption plate and corresponds to an individual chip on the wafer being processed. The vacuum source is connected to each of the chip absorbers respectively and provides vacuum to the mounting plate.
A semiconductor package manufacturing apparatus using the disclosed wafer table comprises a board supplying means, an alignment station, a sawing station, a cleaning station, a die bonding stage and die bonding means. The alignment station aligns the wafer as it is received from a wafer carrier. The sawing station is typically arranged near the alignment station and is arranged to saw the wafer along the scribe lines to separate the individual chips. The cleaning station is typically installed near the sawing station and is used to remove debris from the sawed wafer and the wafer table after the sawing process has been completed.
The die bonding stage is typically installed near the cleaning station for receiving the wafer table supporting the individual chips from the cleaning station after the cleaning process has been complete. The board supplying means preferably comprises a board carrier for holding boards and a board conveyer for transferring the boards to the die bonding stage. The die bonding means is typically arranged to move between the board conveyer and the die bonding stage to remove individual chips from the wafer table and bond the chips onto boards arranged on the board conveyer. The die bonding means picks up an individual chips as it is elevated by movement of the corresponding chip absorber and moves it to a predetermined location on the waiting board where it is bonded into place.
The wafer table is configured to allow sequential movement between the sawing station, the cleaning station and the die bonding stage during the wafer sawing/die bonding process. Preferably, the sawing station and the cleaning station each includes a chamber capable of enclosing and sealing the wafer table during operation to reduce the chance of contamination.
Preferably, the semiconductor package manufacturing apparatus will also include a waste receptacle into which debris from the wafer table may be discharged. The wafer table will then typically be returned to the alignment station to receive a new wafer after the debris has been discharged into the waste receptacle.
Preferably, two or more wafer tables can be operated simultaneously and sequentially among the sawing station, the cleaning station and the die bonding stage for increasing the efficiency and throughput of the wafer sawing/die bonding process.
Another semiconductor package manufacturing apparatus using an exemplary wafer table according to the invention comprises an alignment station, a sawing station, a cleaning station, a chip sorting stage, a chip sorter and a sorting tray. The alignment station aligns a wafer transferred from a wafer carrier. The sawing station is typically installed near the alignment station and saws the wafer aligned on the wafer table into individual elements such as chips, especially WL CSPs. The cleaning station is typically installed near the sawing station to remove debris from the sawed wafer and the wafer table and a chip sorting stage is typically installed near the cleaning station.
The wafer table is preferably configured to permit movement from the cleaning station to the chip sorting stage after the cleaning process has been completed. The chip sorter is typically installed near the chip sorting stage for sorting the individual chips held on the wafer table. The sorting tray receives and stores the individual chips transferred by the chip sorter. During the wafer sawing/chip sorting process, the wafer table moves sequentially through the sawing station, the cleaning station and the chip sorting stage. The chip sorter picks up the individual chips, such as WL CSPs, as they are elevated by movement of the corresponding chip absorbers and transfers them to the sorting tray. Preferably, each of the sawing station and the cleaning station has a chamber sealing the wafer table during operation to reduce the chance of contamination.
Preferably, the semiconductor package manufacturing apparatus includes a waste receptacle into which debris on the wafer table from the saving operation is discharged. In addition, before the wafer table returns to the alignment station after the chip sorting process, any remaining debris on the wafer table is typically discharged into the waste receptacle.
Preferably, two or more wafer tables can be simultaneously and sequentially operated between the sawing station, the cleaning station and the chip sorting stage for increasing the efficiency and throughput of the wafer sawing/chip sorting process.